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Altera_Forum
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11 years ago

how to embeded the Nios software into FPGA sof file?

Hi, I'm confused about combining the Bios software with the FPGA hardware code. In Nios I generated the mem_init file, and added them into my quartus project, and the reset vector I set to the on-chi...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

hi, Stewart, thanks! Now I solved the first problem, just re-build the whole Nios project, still select the on-chip RAM, it can work, I don't know why.

For the second problem, I'm doing another test, I tried to create a jic file in which two sof files are invloved, with either one of the sof files FPGA can works and can boot from EPCS, but FPGA cannot boot from EPCS with the new jic file, I just followed the guidance found in Altera Wiki, it cannot work.