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Altera_Forum
Honored Contributor
20 years agoHi,
You can allocate the buffer by using fuction: alt_uncached_malloc() which is discribed in 'NiosII Software Development Handbook'. Also you can use bit31 method. NiosII CPU can address 4G space, but the higher 2G and the lower 2G are overlaying, the only different is that the higher 2G address will bypass the Cache which means that is the bit31 of address equals to 1, then the access will by pass the Cache. The third to by pass Cache is IO operations, as the following show: IORD_ALTERA_AVALON_PIO_DATA(base) IOWR_ALTERA_AVALON_PIO_DATA(base, data) The HAL provides the C-language macros IORD and IOWR that expand to the appropriate assembly instructions to bypass the data cache. The IORD macro expands to the ldwio instruction, and the IOWR macro expands to the stwio instruction. These macros should be used by HAL device drivers to access device registers. regards, David