Honored ContributorI want to try some frequency higher than 100Mhz on DE2-70.
I built a simple system( only mcu, sysid, onchip-ram and jtag-uart) . But I cannot get it work with 105 ,116.6 or 120 Mhz, I even can not read the sysid. Is 100Mhz the fastest speed I can get?
Honored ContributorNo, You can get even faster, but You need to add proper constraints for Your design.
Honored ContributorI think someone has previously mentioned that the JTAG debug has to be run at a lower clock rate behind an appropriate bridge.
Honored ContributorI'm not aware of an upper limit for the debug module but there is a minimum frequency requirement of 20MHz.
Is your design meeting timing? I would expect that even without timing constraints it should have still worked assuming timing was met.Honored ContributorMy design is based on DE2_70_SD_Card_Audio_Player (from Teriasic's DE2-70 CD). The jtag-uart is running at 50Mhz behined the pipeline_bridge. But I didn't take a look at other timing constraints.
