Honored Contributor
Honored ContributorFor overhead, I have:
5 instructions at the reset vector (followed by 12 bytes pad) - these set %gp, %sp and %et then jump to the C. 38 instructions at the exception vector to save all the registers (relative to %et), generate an external interrupt and loopstop. 8 instructions in the C prologue that save registers in a stack frame - I didn't manage to persuade gcc not to do this [1] - even though the function has no epilogue (to reverse the prologue). This means my C starts at offset 0xdc in the code memory block. The 2.5k of code does multichannel hdlc (including bitstuffing - 6.5k of lookup table) aggredate 4Mbps. A second nios with a massive 7.5k code handles the timers and retransmittions and the interface to the outside world. [1] I didn't try that hard! If I'd managed to, there'd be no references to %sp in the assembler, so I could (in theory) have told gcc -fcall-used-sp and generated another free register. Letting it have %bt, %ba, %r1 (never ever used) and %ta (I don't return from traps) as extra registers would be easier, but I managed to adjust the C to avoid any on-stack variables without doing so.
