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Honored Contributor
Honored ContributorHow can I get data from FPGA frabic via FPGA-to-HPS?
Hello, I implement the a soft-IP AXI master in FPGA and transmit the data to HPS side via FPGA2HPS bridge, I set ACP-port as "dynamic" mode. BUT how can I read the data via DS-5 program registe...
Altera_ForumHonored Contributor
Honored ContributorHi Alex,
Please refer to the Getting Started with Peripheral Register Visibility section of the SoC EDS User's Guide (http://www.altera.com/literature/ug/ug_soc_eds.pdf). I think that should answer your question. Regards, Sue
