how can i access the output

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but my logic is pipelined, and have an input each clk, is ther any function that can use as a timer in c, instead implementing it in vhdl.

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You don't need a timer - you're only going to wait 26 clocks. I used a macro that did memory reads to get me the number of clocks to stall before reading:

#define WAIT_CLKS() do { volatile int x, *y = &x; (void) *y; (void) *y; (void) *y;  } while(0)

Use a scope to figure out how many reads from *y you need to wait 26 clocks and simply use this macro where you want a write, wait, read sequence.

BillA