Help with us delay routine in C

Here's some code that may be close enough for what you are

doing. The following delays for a number of clock cycles. You'll

need to define the size of the instruction cache:

/*
 * dly_clks
 *
 * Instruction performance varies based on the core. For cores
 * with icache and static/dynamic branch prediction (II/f, II/s):
 *
 *  Normal ALU (e.g. add, cmp, etc):    1 cycle
 *  Branch (correctly predicted, taken):    2 cycles
 *    Negative offset is predicted (II/s).
 *
 * For cores without icache and/or no branch prediction (II/e):
 *
 *  Normal ALU (e.g. add, cmp, etc):    6 cycles
 *  Branch (no prediction):      6 cycles
 *
 * For simplicity, if an instruction cache is implemented
 * assume II/f or II/s. Otherwise, assume the II/e.
 *
 */
  .globl dly_clks
dly_clks:
# if (ICACHE_SIZE > 0)
        subi    r4, r4, 3                /* 3 clocks/loop */# else
        subi    r4, r4, 12              /* 12 clocks/loop */# endif
        bge    r4, r0, dly_clks
        ret

You can then base your delay routine on the configured

cpu clock speed. For example:

extern void dly_clks (unsigned long ticks);
void udelay (unsigned long usec)
{
        unsigned long cnt = (SYS_CLK_FREQ/1000000) * usec;
        dly_clks (cnt);
}

Your mileage may vary based on your clock & cache config ;-)

Regards,

--Scott