Altera_Forum
Honored Contributor
14 years agoHelp me!!
(Quatus 9.1) Error (10170): Verilog HDL syntax error at multiplicador_3b.v(7) near text "begin"; expecting a description. module multiplicador_3b(P5, P4, P3, P2, P1, P0,A2, A1, A0 , B2, B1,...