Honored Contributor
Honored Contributora software based solution will never be as accurate as a hardware based solution.
there a several possible solutions for this you dac ip can act as a master, so the nios cpu will programm this ip via its slave ports and setup memory adr of the first value and the number of values. after this you enable the master via one control bit. the master port of your dac will read value after value from the memory location without getting "help" from the cpu. a simple FSM will obey the required DAC clock and store the last read value (by your master) into your dac and start the next read from the memory. in that case, when the cpu has started this functionality, the cpu does not have anything left to do. or you place all the values into onchip memory inside your ip module, and when done you ip will read out value by value and feed your dac with it, assuming you have enough onchip memory availble
