Hello I would like to use the on-chip RAM in quartus for a custom design which doesnt use the avalon bus.Could you please advise me which component from the ip library catalogue i should use as the memory controller ?

Hi,

Do you have Qsys system? avalon interface will be used inside Qsys system (Nioss II , On-chip ram, Jtag uart ..etc) ?

You can create a Top level file and instantiate both Qsys system and your custom design.

So that you can use on-chip ram memory

or

You want to use only memory for your design?(without avalon interface /Qsys system)

Simply use the memory template available in quartus (Edit->insert template->verilog HDL->Full design->RAM and ROM's ->select the required design)->save it and use it in you top level module/entity.

Let me know if this has helped resolve the issue you are facing or if you need any further assistance.

Best Regards,

Anand Raj Shankar

Thanks for your response.i would like to just use the ram and can I use any generic memory controller with this ram or is there a template for the controller ?

Hi,

Yes, you can use you own memory controller with this ram. You can fine information from google

Let me know if you need any further assistance.

Regards

ARS

I am trying to integrate the ram and other custom components with the chroma resampler,color space converter generated by qsys and written out in vhdl.is that possible or is there any license (using quartus lite free edition) restrictions or coding restrictions ?

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​Hi,

Yes, you can use Quartus Lite for integrate or design.

I have no idea on the IP's used in your Qsys system, However may be some IP in you qsys system may required license.

Example: Nios II is available in e and f variant where e is free and f required license.

You can check the IP's in your qsys system.

Let me know if this has helped resolve the issue you are facing or if you need any further assistance.

Regards

Anand​

thank you for your responses