Hello I would like to use the on-chip RAM in quartus for a custom design which doesnt use the avalon bus.Could you please advise me which component from the ip library catalogue i should use as the memory controller ?

Hi,

Do you have Qsys system? avalon interface will be used inside Qsys system (Nioss II , On-chip ram, Jtag uart ..etc) ?

You can create a Top level file and instantiate both Qsys system and your custom design.

So that you can use on-chip ram memory

or

You want to use only memory for your design?(without avalon interface /Qsys system)

Simply use the memory template available in quartus (Edit->insert template->verilog HDL->Full design->RAM and ROM's ->select the required design)->save it and use it in you top level module/entity.

Let me know if this has helped resolve the issue you are facing or if you need any further assistance.

Best Regards,

Anand Raj Shankar