Getting Nios to talk to on chip logic

Cobra,

I was able to get an Avalon MM slave on the weekend and instantiated and compiling without error.

I have some work to do on the Avalon protocol... here is the neat part, templates are available that start you in the right direction... then add signals ... the signals names have to match predefinced names I believe inorder for the QSYS generate to correctly associate them and there is a button to generate an empty component RTL file . The file is not entirely empty as outputs are assigned to be quiescent.

So... I figure with the component RTL, just add finction to it.

I need a full slave to set component state machine parameters and a monitor side to the component that monitors the master output of interest.

I agree that examples are handy ... to make a start.

I was looking at the DMA component for the RTL function of the DMA but could not find it possibly it is encrypted.

Regards, Bob.