ovguozgur
New Contributor
New ContributorGenaration- DDR3 SDRAM Controller with UniPHY Intel FPGA IP 21.1
Hello,
When I try to create the DDR3 Controller IP, I got the following error.
My oparating system is Win10 x64 21H2 Build 19044.1466
Quartus Version is 21.1 ( I also got same error with 19.1 and 17.1)
Info: drr: Variation language : Verilog Info: drr: Output directory : C:\intelFPGA_lite\21.1\DDR Info: drr: Generating variation file C:\intelFPGA_lite\21.1\DDR\drr.v Info: drr: Generating synthesis files <html>Info: Generating <b>altera_mem_if_ddr3_emif</b> "<b>drr</b>" for QUARTUS_SYNTH <html>Info: "<b>drr</b>" instantiated <b>altera_mem_if_ddr3_emif</b> "<b>drr</b>" <html>Info: "<b>drr</b>" instantiated <b>altera_mem_if_ddr3_pll</b> "<b>pll0</b>" Info: Generating clock pair generator Info: Generating drr_p0_altdqdqs Info: Info: ***************************** Info: Info: Remember to run the drr_p0_pin_assignments.tcl Info: script after running Synthesis and before Fitting. Info: Info: ***************************** Info: <html>Info: "<b>drr</b>" instantiated <b>altera_mem_if_ddr3_phy_core</b> "<b>p0</b>" <html>Info: "<b>drr</b>" instantiated <b>altera_mem_if_ddr3_afi_mux</b> "<b>m0</b>" Error: Error during execution of "{C:/intelfpga_lite/21.1/quartus//../nios2eds/Nios II Command Shell.bat} make all 2>> stderr.txt": child process exited abnormally Error: Execution of command "{C:/intelfpga_lite/21.1/quartus//../nios2eds/Nios II Command Shell.bat} make all 2>> stderr.txt" failed Error: /mnt/c/intelfpga_lite/21.1/quartus/bin64/uniphy_mcc.exe -ac_code sequencer_mc/ac_rom.s -inst_code sequencer_mc/inst_rom.s -ac_rom ../drr_s0_AC_ROM.hex -inst_rom ../drr_s0_inst_ROM.hex -header sequencer/sequencer_auto.h -vheader ../sequencer_auto_h.sv -ac_rom_init sequencer/sequencer_auto_ac_init.c -inst_rom_init sequencer/sequencer_auto_inst_init.c -DAC_ROM_USER_ADD_0=0_0000_0000_0000 -DAC_ROM_USER_ADD_1=0_0000_0000_1000 -DAC_ROM_MR0=0001000110001 -DAC_ROM_MR0_CALIB= -DAC_ROM_MR0_DLL_RESET=0001100110000 -DAC_ROM_MR1=0000000000000 -DAC_ROM_MR1_OCD_ENABLE= -DAC_ROM_MR2=0000000001000 -DAC_ROM_MR3=0000000000000 -DAC_ROM_MR0_MIRR=0001001001001 -DAC_ROM_MR0_DLL_RESET_MIRR=0001011001000 -DAC_ROM_MR1_MIRR=0000000000000 -DAC_ROM_MR2_MIRR=0000000010000 -DAC_ROM_MR3_MIRR=0000000000000 -DQUARTER_RATE=0 -DHALF_RATE=1 -DFULL_RATE=0 -DNON_DES_CAL=0 -DAP_MODE=0 -DGUARANTEED_READ_BRINGUP_TEST=0 -DMEM_ADDR_WIDTH=13 -DHARD_PHY=0 Error: UniPHY Sequencer Microcode Compiler Error: Copyright (C) 2021 Intel Corporation. All rights reserved. Error: Info: Reading sequencer_mc/ac_rom.s ... Error: Info: Reading sequencer_mc/inst_rom.s ... Error: Info: Writing ../drr_s0_AC_ROM.hex ... Error: Info: Writing ../drr_s0_inst_ROM.hex ... Error: Info: Writing sequencer/sequencer_auto_ac_init.c ... Error: Makefile:27: recipe for target 'mc' failed Error: child process exited abnormally Error: Cannot find sequencer/sequencer.elf <html>Error: An error occurred<br> while executing<br>"error "An error occurred""<br> (procedure "_error" line 8)<br> invoked from within<br>"_error "Cannot find $seq_file""<br> ("if" then script line 2)<br> invoked from within<br>"if {[file exists $seq_file] == 0} {<br> _error "Cannot find $seq_file"<br> }"<br> (procedure "alt_mem_if::util::seq_mem_size::get_max_memory_usage" line 14)<br> invoked from within<br>"alt_mem_if::util::seq_mem_size::get_max_memory_usage [file join "sequencer" "sequencer.elf""<br> invoked from within<br>"set calc_mem_size [alt_mem_if::util::seq_mem_size::get_max_memory_usage [file join "sequencer" "sequencer.elf"]]"<br> ("if" then script line 2)<br> invoked from within<br>"if { !$do_only_rw_mgr_mc && !($bfm_mode || $hps_mode)} {<br> set calc_mem_size [alt_mem_if::util::seq_mem_size::get_max_memory_usage [file join "sequenc..."<br> (procedure "generate_qsys_sequencer_sw" line 943)<br> invoked from within<br>"generate_qsys_sequencer_sw $prepend_str $protocol $pre_compile_dir $fileset $inhdl_dir $rdimm $lrdimm 0 0 $nios_hex_file_name $ac_rom_init_file_name ..."<br> invoked from within<br>"set seq_mem_size_list [generate_qsys_sequencer_sw $prepend_str $protocol $pre_compile_dir $fileset $inhdl_dir $rdimm $lrdimm 0 0 $nios_hex_file_name ..."<br> ("if" else script line 2)<br> invoked from within<br>"if {[::alt_mem_if::util::qini::qini_value alt_mem_if_seq_size_request 0] > 0} {<br> set seq_mem_size [::alt_mem_if::util::qini::qini_value alt_mem_if_se..."<br> (procedure "alt_mem_if::gen::uniphy_gen::generate_qsys_sequencer" line 238)<br> invoked from within<br>"alt_mem_if::gen::uniphy_gen::generate_qsys_sequencer "${name}" $protocol $tmpdir $fileset {}"<br> invoked from within<br>"set qsys_sequencer_files_list [alt_mem_if::gen::uniphy_gen::generate_qsys_sequencer "${name}" $protocol $tmpdir $fileset {}]"<br> (procedure "alt_mem_if::gen::uniphy_gen::generate_sequencer_files" line 3)<br> invoked from within<br>"alt_mem_if::gen::uniphy_gen::generate_sequencer_files $name "DDR3" $tmpdir QUARTUS_SYNTH"<br> invoked from within<br>"foreach generated_file [alt_mem_if::gen::uniphy_gen::generate_sequencer_files $name "DDR3" $tmpdir QUARTUS_SYNTH] {<br> set file_name [file tail $genera..."<br> (procedure "generate_synth" line 8)<br> invoked from within<br>"generate_synth drr_s0"
I try everything post solutions below:
The Error still occurs. I dont know how can I fix.
