From the manual:
--- Quote Start ---
STW
Description
Computes the effective byte address specified by the sum of rA and the instruction's signed 16-bit immediate value. Stores rB to the memory location specified by the effective byte address.
the effective byte address must be word aligned. If the byte address is not a multiple of 4, the operation is undefined.
--- Quote End ---
Seems that it is not gcc doing this. The compiled code actually uses the value pointer+1 to do a STW (store word) instruction. It is the NIOS instruction set that aligns the store word instruction (it appears to truncate the low 2 bits of the store address for STW, but the manual says "undefined", meaning that it might be different in a different version of the processor).
No way around it. To store at byte addresses, you are going to have to use bytes, or use a different processor, or write your own routine for storing words at byte addresses (another version of "using bytes");