Altera_Forum
Honored Contributor
13 years agoFrame Locking
Hello,
I'm trying to Frame Lock one CVI, to 2 CVOs. To achieve this, I gave the sof and sof_locked from the CVI, to the inputs of the CVO (in the .bdf File). The CVI control register bits 0 and 3 are set to 1. (0 to output the video, 1 to output the sof and sof_locked). Then I put the CVOs control registers bit 0, 3 and 4 to 1. (0 to output the video, 3 to output the own sof and 4 to synchronize the CVO sof to the CVO sof). Currently I get the pictures at my output, but they are not Frame Locked. So I think that I don't have correctly written the registers. Can you check it for me please? IOWR_32DIRECT(CVI_BASE, 0x0, 9); //d9 => b1001 IOWR_32DIRECT(CVO0_BASE, 0x0, 25); //d25 => b11001 IOWR_32DIRECT(CVO1_BASE, 0x0, 25); The base addresses seems to be right, because I get an output. IORD_32DIRECT(CVO0_BASE, 0x0); give out a "25". So it seems that it only read the first 16bit (the control register), but not the next 16 bit (status register), because if it would read the status register, it would be higher then 2^16 because the first bit of the status register should say me if the output is enabled, and actually it is. Can you help me with the addresses? Thank you, TI30X