Forum Discussion
Altera_Forum
Honored Contributor
8 years agoThink how fast your counter is counting. Compare that to how fast the Nios processor can print the value. If the counter is free-running at 50MHz but the processor can say only print 5 to 10 numbers per second, then you will only see every millionth or so number which will effectively appear to be random.
If you want to process each number one by one, you would need some form of flow control - e.g. a flag that tells the FPGA to increment the counter which Nios can use to slow the count rate down. However if you are doing that they why bother using the FPGA to do the counting at all when you can far more simply and efficiently do the same thing in C code running on the Nios processor.