Flash read causes two reads

IIRC the nios data master always does 32 bit reads (and asserts all byte enables). Their will be a bus width adapter between that and a 16bit slave - which will convert every read request from the nios into 2 reads of the slave.

The only way I know of to avoid that is to make the slave have a 32 bit interface.

You then need you own logic to perform the two 16 bit cycles under normal conditions - while allowing a single cycle for programming operations (etc).

Or maybe it is possible to map the flash memory at multiple addresses with different properties ...