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Altera_Forum
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19 years ago

FIFOed Avalon Uart

I have posted the FIFOed avalon UART in the Hardware Projects area. It is the standard UART that comes with Nios but it has additional features such as FIFOs and hardware CTS fifoed avalon uar...
Altera_Forum's avatar
Altera_Forum
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12 years ago

Hi,

I'm using the last version of fifoed Avalon UART under Q13.0SP1, and I see the following warning related to it:

Warning (10858): Verilog HDL warning: object is_parity_error used but never assignedwire is_parity_error

The warning is clear, I'd like to understand if this wire (is_parity_error) not drived by anyone, and used in one expression, is dangling undrived because it's superfluos, or for some reason should be correctly drived by some logic (that in this case is missing), and so it's a kind of bug that could arise when a parity error happens...

Any experience?

Can we safely ignore this warning?

Best regards

Gianluca