I figured out how to add RTS flow control in hardware using the UART with FIFO's.
Add the FIFO'ed UART component in SOPC builder. Check the configuration box to add RTS & CTS register bits. Generate the system.
When it's done generating, open uart.vhd and edit:
Look for:
rts_n <= NOT rts_control_bit;
Comment out this line and add the following:
-- Generate RTS
rts_c: process (clk, reset_n)
begin -- process rts_c
if reset_n = '0' then -- asynchronous reset (active low)
rts_n <= '1'; -- 1=OK to send
elsif clk'event and clk = '1' then -- rising clock edge
if (rx_used(rx_used'left) = '0') then -- FIFO is < 1/2 full
rts_n <= '0'; -- inverted at tranceiver
else
rts_n <= '1';
end if;
end if;
end process rts_c;
This asserts RTS when the receive FIFO is 1/2 full.
Note that reading the RTS bit in the UART register will not reflect the state of the pin. You'd have to find where rts_control_bit is read and substitute rts_n.
Note that RTS is inverted at the RS232 tranceiver, so the levels you'll see on the port are reversed from the code.
Hope this helps. I tested it & it works well on my system.