Honored Contributor
Honored ContributorThe FIFOed Uart calculates from a wrong clock if a sopc pll is used ...
If you open the Configuration dialog and have a look at the Baud Rate you will see the value of the input clock. the value is wrong. it is the value of the input clock that enters the sopc and feeds the pll but not the one this module is connected to. as it is actually the c0 output of the pll. im my case 48MHz input and 64MHz output. all SOPC modules are connected to the 64MHz output of the pll. The dialog displayes the 48MHz what ist wrong in this case. But i am not shure if the values internaly calculated are based on 48MHz or 64MHz in my case ... regards. Michael
