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Honored Contributor
Honored ContributorFIFO - Transfer of data
IS there anyway to transfer data in\out of the SOPC FIFO instantiated core to logic outside of the SOPC sytem without using a NIOS ? It seems from the datasheets of the core that the only way to acce...
Altera_ForumHonored Contributor
Honored ContributorDear BadOmen,
Thank you so much for your help. Could you please explain a in a bit more detail what you wrote :- "Master --> |Slave FIFO Export| ---> Outside SOPC Builder Source --> |Sink FIFO Export| ---> Outside SOPC Builder Send data into SOPC Builder system: Outside SOPC Builder ---> |Export FIFO Slave| ---> Master Outside SOPC Builder ---> |Export FIFO Source| ---> Sink The |xxxx FIFO xxxx| is supposed to represent the ports you should use to accomplish this. To see how you should hookup the FIFO signals to the ports I recommend instantiating the FIFO components that come with SOPC Builder and see how the signals map (generate the system to see the HDL). You'll find the logic maps very well just using empty/full to map to !ready and waitrequest." I am sorry I didn't really understand it
