Fft In Sopc

Hello Necsagar,

Sorry for the dalay. I am tying this code directly to the post, so please excuse any typos. Name the component "ff_avalon_wrapper.vhd". Code below:

library IEEE;
use IEEE.std_logic_1164.all;
 
ENTITY fft_avalon_wrapper IS
Port{
clk : in std_logic;
reset_n : in std_logic;
mm_writedata : in std_logic_vector(7 downto 0);
mm_write : in std_logic;
sink_valid : in std_logic;
sink_sop : in std_logic;
sink_eop : in std_logic;
sink_empty : in std_logic_vector(1 downto 0);
sink_real : in std_logic_vector(31 downto 0);
sink_error : in std_logic_vector(1 downto 0);
source_ready : in std_logic;
sink_ready : out std_logic;
source_error : out std_logic_vector(1 downto 0);
souece_sop : out std_logic;
source_eop : out std_logic;
source_valid : out std_logic;
source_data : out std_logic_vector(63 downto 0);
source_empty : out std_logic_vector(2 downto 0)
};
 
END fft_avalon_wrapper;
 
ARCHITECTURE SYN OF fft_avalon_wrapper IS
 
component FFT_1024 IS
PORT{
clk : in std_logic;
reset_n : in std_logic;
fftpts_in : in std_logic_vector(12 downto 0);
inverse : in std_logic;
sink_valid : in std_logic;
sink_sop : in std_logic;
sink_eop : in std_logic;
sink_real : in std_logic_vector(15 downto 0);
sink_imag : in std_logic_vector(15 downto 0);
sink_error : in std_logic_vector(1 downto 0);
source_ready : in std_logic;
fftpts_out : out std_logic_vector(12 downto 0);
sink_ready : out std_logic;
source_error : out std_logic_vector(1 downto 0);
source_sop : out std_logic;
source_eop : out std_logic;
source_valid : out std_logic;
source_real : out std_logic_vector(30 downto 0);
source_imag : out std_logic_vector(30 downto 0)
};
END COMPONENT
 
signal fftpts_in_s, fftpts_out_s : std_logic_Vector(12 downto 0);
signal real_data_s, imag_data_s : std_logic_vector(30 downto 0);
signal fft_inverse_s : std_logic;
 
BEGIN
FFT_1024_inst :FFT_1024
PORT MAP{
clk => clk,
reset_n => reset_n,
fftpts_in => fftpts_in_s,
fftpts_out => fftpts_out_s,
inverse => inverse_s,
sink_valid => sink_valid,
sink_sop => sink_sop,
sink_eop => sink_eop,
sink_real => sink_real(7 downto 0) & sink_real(15 downto 8), -- SGDMA flips byts. This assignment flips the bytes back the right way.
sink_imag => sink_real(23 downto 16 ) & sink_real(31 downto 24), --SGDMA flips byts. This assignment flips the bytes back the right way.
sink_ready => sink_ready,
sink_error => sink_error,
source_error => source_error,
source_ready => source_ready,
source_sop => source_sop,
source_eop => source_eop,
source_valid => source_valid,
source_real => real_data_s,
source_imag => imag_data_s
};
 
--Flip the bytes and sign extend...
source_data(63 downto 56) <= imag_data_s(7 downto 0);
source_data(55 downto 48) <= imag_data_s(15 downto 8);
 
source_data(47 downto 40) <= imag_data_s(23 downto 16);
source_data(39) <= imag_data_s(30) ; -- Sign extension for imag data...
 
source_data(48 downto 32) <= imag_data_s(30 downto 24);
 
source_data(31 downto 24) <= real_data_s(7 downto 0);
source_data(23 downto 16) <= real_data_s(15 downto 8);
 
source_data(15 downto 8) <= real_data_s(23 downto 16);
source_data(7) <= real data_s(30); -- Sign extension for real data...
source_data(6 downto 0) <=real data_s(30 downto 24);
 
 
process(clk)
begin
if(rising_edge(clk)) then
fftpts_in_s <= "1000000000000";
fft_inverse_s <= '0';
end if;
end process;
 
END SYN;
 
 

A few notes about my FFT implementation

• 16 bit data precision

• 4096 FFT points (as specified by fftpts_in)

• Each fft output is 31 bits. This enable me to encapsulate each component into a single location. Naturally, you need to make sure that you extract each of the component as 32 bit values in your C code. This can be accomplished by casting the (*alt_u64) pointer into a (*alt_32) pointer, enabling you to access each component.

• If your FFT application uses FFT outputs that are greater than 64 bits (or 32 bits for each component), this will not work properly since the SGDMA is limited to a 64 bit word size. If you find out how to get around this limitation let me know because I would like to use a bigger FFT size, but can not since the data width will be larger than 64 bits.

Hope this helps. Let me know if you have any questions.