Fft In Sopc

Hi every body,

to marlon:

i am sory for late.

for quastion about using 12 and 14.

while(IORD(SGDMA_MM_TO_ST_FFT_BASE,0) != 12);

while(IORD(SGDMA_ST_TO_MM_FFT_IMAG_BASE,0) != 14);

meaning:

when i read this number from Status Registers, that mean SGDMA finished transfer data without wrong.

to understand exactly what it means you can read this document:

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"Quartus II Handbook Version 9.1, Volume 5: Embedded Peripherals" available at http://www.altera.com/literature/hb/nios2/n2cpu_nii5v3_05.pdf

to read about SGDMA :Page 209

to read about Status Registers bit Map:Page 221

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to necsagar:

when you start your Project you should use same language in all project.

i think you start project in VHDL, So when you add new component (like FFT core) you should add it using VHDL.

you can not use my wrapper_FFT file for your FFT component, But you should write new wrapper in VHDL.

if you have problem in using FFT core you can read this document:

"FFT MegaCore Function User Guide"

start from page 21