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Altera_Forum
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10 years ago

fast passive parallel configuration using NIOS II

Hello, I am new to cyclone FPGAs hardware design, I have been given a requirement for a hardware which has 4 Cyclone IV E devices. I already have set up active serial and JTAG configuration p...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

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You should be relatively free to connect any of those how you like to the general purpose I/O in Cyclone IV (and other families). The 'IP core information', as you put it, isn't necessarily required. However, I would always recommend checking any chosen pinout with Quartus prior to committing to a new PCB. I think you'll have little trouble with any of those memory types.

Cheers,

Alex

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Thank you very much!