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Altera_Forum
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16 years ago

Ethernet performance using TSE in uClinux

Hi all, I am measuring ethernet performance on a NIOS II based board with an Altera TSE IP Core running uClinux, and it's been disappointing so far. I've done timing using TCP and UDP, and bar...
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Altera_Forum
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16 years ago

Yes. that was me :)

I experimented with the ucOS, but I guess the same method could be used with Linux.

You would need to run a profiler to find what functions are called most.

If you have a big FPGA I would suggest to store the packets on chip instead of the SSRAM, as suggested in this design example (http://www.altera.com/support/examples/nios2/exm-ethernet-acceleration.html?gsa_pos=1&wt.oss_r=1&wt.oss=ethernet%20accelerate). The Ethernet driver will need some rewrite to use the packet memory, I don't know how easy it is to do for Linux.

If you can also put some code in tightly coupled memory, it will help too. The thread linked by Nails shows how to move functions in different memories using a custom linker script. A bigger CPU instruction cache could be enough though, and is a lot easier to do.