Forum Discussion
Altera_Forum
Honored Contributor
16 years ago --- Quote Start --- The Reset address should be pointed at some non-volatile location (onchip memory or flash). The Exception address should be pointed at RAM....in your case either onchip or SRAM, _not_ SDRAM :-) Cheers, - slacker --- Quote End --- Thank you very much, slacker. However, the problem still exists when I arrange the reset vector in flash and exception vector in sram.