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Altera_Forum
Honored Contributor
11 years agoError while simulating nios ii with custom component
Hello all, i want to simulate a Qsys system which contains nios ii and a custom peripheral. I created the testbench system in Verilog (Simple, BFMs for clocks and resets) and launch modelsim throu...
Altera_Forum
Honored Contributor
10 years agoCan you check your objdump to see whether the 3 IOWR gets compiled into assembly?