Honored ContributorHello everyone,
Is there any way to reduce the error probability in a serial transmission using the UART provided by Altera? For a baudrate of 115200 bps there is a Pe = 0.001 (1 erronous byte each 1000 bytes). Maybe, to fix the error, the rate of the system clk must be different? Many thanks
Honored ContributorTime to write your own uart :-)
Honored ContributorThanks. I'll consider it :)
I 'll comment any progress!Honored ContributorHmmm.... The standard Altera UART seems to only have a 1x clock input. Even if it uses both edges that isn't enough to (easily) decode async.
The fifo uart only seems to have pre-defined baud/divisors, so it is difficult to verify from the docs. If the data isn't oversampled then it will go wrong.
