Forum Discussion
Altera_Forum
Honored Contributor
14 years ago --- Quote Start --- There are some critical warnings about timings which didn't meet the specification. I read that I can ignore that as it has something to do with the JTAG. I was unable to solve these timing issues (again my lag of knowledge of FPGA programming etc). --- Quote End --- What are the failing paths? You can only ignore those messages if the failing paths are actually in the jtag components.