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Altera_Forum
Honored Contributor
16 years agoThe .jdi file is generated in your hardware folder where the Quartus II project files live. Basically there can't be two identical instance ID values in an FPGA design so Quartus II sometimes has to re-assign them on the fly which would cause the ID to be different than what's programmed in the .ptf/.sopcinfo file. Loading the .jdi file is the only way to make sure the IDs are consistant across the tools.
Judging by your console output you want to force the instance number to 0 which loading the .jdi should do for you. The top node is the Nios II JTAG debug module and the other one is the JTAG Uart. The last two digits of the node ID is the instance ID so you have instance IDs of 0 for both the debug module and JTAG uart. There is more information about this stuff in the embedded design guide that you can download from either the Nios II or SOPC Builder literature pages on www.altera.com (http://www.altera.com) You might have a timing violation causing the value to be read back wrong. Someone was asking me about this same issue the other day so when I run into them I'll ask them how they worked around this issue in their design.