Honored Contributor
Honored ContributorThe JTAG interface on the FPGA allows it to be configured (via the .sof) and allows FPGA fabric access after the FPGA is configured, eg., the JTAG-UART.
The EPCS configures the FPGA at power-on. Typically you would use JTAG to configure the FPGA while you are debugging a design, and once you are happy with it, you can program the EPCS device. To add to your confusion, EPCS devices can be programmed either using an "Active Serial" header (which your board sounds like it has), or via JTAG in a two step process where Quartus first configures the FPGA with a design containing the Serial Flash Loader (SFL) component (a design containing JTAG-to-FPGA fabric logic), and then Quartus uses that design to program the EPCS device. This is called JTAG indirect configuration and requires you convert the programming file(s) to .jic format. Using JTAG to program the EPCS device involves a couple more steps, but its nicer in that you do not have to keep changing connectors on your board (most new boards do not even bother to include an AS header). Cheers, Dave
