Honored Contributor
Honored ContributorI still did not found an solution...
I create one JIC file with following images: BLOCK START ADDRESS END ADDRESS hwimage_app1.hex 0x00000000 0x0002FEB3 swimage_app1.hex 0x0002FEB4 0x00038C83 hwimage_app2.hex 0x00090000 0x000BF762 swimage_app2.hex 0x000BF763 0x000C8502 I changed the bootloader of the second hardware image: in boot_loader.h I define the base image address which I give with the JIC creation and use register 21 for this # define r_reconfig_image_base r21 # define SECOND_IMAGE_ADDRESS 0x90000 in boot_loader.S move this address to r_reconfig_image_base movi r_reconfig_image_base, SECOND_IMAGE_ADDRESS and in boot_loader_epcs_bits_sii_siii_ciii.S I make use of this register // 1) Open EPCS-device at flash-offset zero. mov r_flash_ptr, r_reconfig_image_base // Close & re-open EPCS where we will start extracting the length addi r_flash_ptr, r_reconfig_image_base, 48 // Close & re-open EPCS at byte 33 addi r_flash_ptr, r_reconfig_image_base, 33 but after compile, convert to hex, replace in SOPC directoy, update memory initial files and compile in quartus it does not run my NiosII code at all. Am I missing a simple thing... or do I need to understand the working of the bootloader completely... Tried to ask Altera for supprt: but their simple answer is: "Altera does not encourage modifying the bootloader". I also have seen the following thread of last week and asked here for help... modifying epcs bootloader (http://www.alteraforum.com/forum/showthread.php?t=28813) I will keep both threads updated if I have an solution...
