EPCS fpga+nios field update

Just to gain some clarity here:

1 - The FPGA will always attempt to load an image starting at address 0 of the EPCS flash unless you've specifically given a different address using the altremote_update core.

2 - The default bootloader for the NIOS when booting from the EPCS will automatically look at the FPGA image, then skip to the end of the file and expect to find the beginning of your software code there.

So here is the question. Are you simply going to overwrite your existing image and software in the EPCS flash or are you planning on keeping a safe image that you'll never overwrite?

You may want to refer to this post:

http://www.alteraforum.com/forum/showthread.php?t=5244&referrerid=2226

In any case, the data you want is the raw binary FPGA image data and the binary software data. Here is a script I have given before to produce the binary files (note that in my script I append the software to the FPGA image to create one single file):

# Creating .flash file for the FPGA configuration
echo Creating firmware flash file ...
"$SOPC_KIT_NIOS2/bin/sof2flash" --epcs --compress --input="../altera/top.sof" --output="firmware.flash"
#  Creating .flash file for software code
echo Creating safe and application flash files ...
"$SOPC_KIT_NIOS2/bin/elf2flash" --epcs --after="firmware.flash" --input="../software/top/Release/top.elf" --output="app.flash"
#  Convert to binary
echo Converting flash files to binary ...
nios2-elf-objcopy -I srec -O binary firmware.flash firmware.bin
nios2-elf-objcopy -I srec -O binary app.flash app.bin
#  Concatenate
echo Concatenating binary files to create final programming file ...
cat firmware.bin app.bin > app_image.bin

Jake