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Altera_Forum's avatar
Altera_Forum
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10 years ago

EPCS controller clock

Hi, I have a NIOS2 Qsys design (ARRIA V, Q14.1) with an EPCS flash controller in it to copy the software from the serial FPGA configuration flash into DDR ram memory at power-up. This copy acti...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

There is a work-around. You can add a serial flash loader IP to your design (through the Megawizard) and use the "Share ASMI interface with your design" option. That way you can program your EPCS with the Quartus programmer through JTAG, and access the pins from your design.

I've never tested it myself but it should work.