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Altera_Forum
Honored Contributor
10 years agoEPCS controller clock
Hi, I have a NIOS2 Qsys design (ARRIA V, Q14.1) with an EPCS flash controller in it to copy the software from the serial FPGA configuration flash into DDR ram memory at power-up. This copy acti...
Altera_Forum
Honored Contributor
10 years agoThe EPCS is connected to the default FPGA configuration pins. These pins are not available as user I/O pins in an ArriaV, so I can't connect my own SPI controller or is there another work-around to connect to these pins??