Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorEPCS controller clock
Hi, I have a NIOS2 Qsys design (ARRIA V, Q14.1) with an EPCS flash controller in it to copy the software from the serial FPGA configuration flash into DDR ram memory at power-up. This copy acti...
Altera_ForumHonored Contributor
Honored ContributorAFAIK the frequency is hardcoded in the controller and can't be changed. But the EPCS controller is nothing more than a SPI controller and a ROM containing the bootloader, so you can instead put your own SPI controller with the frequency you specify, put a custom bootloader in a on-chip ROM block and make the CPU boot from that ROM.
Read the EPCS datasheet though. With the normal read bytes command the maximum frequency is 20MHz. There is also a fast read command that can operate at up to 40MHz, but I don't know which one the standard bootloader uses.
