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Altera_Forum's avatar
Altera_Forum
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15 years ago

EPCS Boot Failure

I have a problem flash deploying my NIOSII system on the DE2 development board.

The NIOS Flash Programmer connects up and reports various nice things about the EPCS. It will then let me select my .sof and .elf files and goes through the process of erase, program and verify and all looks good.

The problem is that when I cycle the power the FPGA doesn't configure. Am I missing an obvious step?

My system uses the SDRAM chip on the board as program memory and it all works fine under the NIOS II IDE in run or debug forms. To what addresses should I set the NIOS II core reset and exception vectors?

4 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    What Quartus Version are you using ?

    There is a known Bug in Quartus 9.1 (without any Service Packs) that is fixed with patch 0,63 or with SP1.

    There seems to be this bug again with the currenty / latest Quartus 9.1 SP2

    some users (an unfortunately me) have the same problem with this version.

    if you have Quartus 9.1 upgrade to 9.1SP1

    or if you have 9.1SP2 then downgrade to 9.1SP1

    and recompile ... for me this is the only solution for the moment
  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    Biker Bob, the reset vector must point to epcs_controller the exception vector can point to sdram or onchip_ram.

    Jens