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Altera_Forum
Honored Contributor
Honored ContributorDual port shared memory
Hi! I am working on a project which includes NIOS as the main host processor and it has other parts designed in verilog (a transceiver, a control unit). In the project a dual port memory is to ...
Altera_ForumHonored Contributor
Honored ContributorHi Guys,
What you've got up there has really helped me. But i have one question? How do you then control this FIFO in Nios? As in, i've made one of these, what c-code do you youse to trigger a read and and accept the data?
