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Altera_Forum
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15 years ago

Dual port shared memory

Hi! I am working on a project which includes NIOS as the main host processor and it has other parts designed in verilog (a transceiver, a control unit). In the project a dual port memory is to ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Hello,

i am in the same position as waqar03 - have a dual port memory block in logic and logic same as nios should read and write to it.

But i am still new to Quartus and Nios - never did something like building own interfaces to this or creating new components in SOPC builder. Could you give me any tutorials or hints or papers where i can learn this so that i get an interface to this dual port?

:/