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Altera_Forum
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9 years ago

Downloading ELF process failed. Connected system ID is also not found.

Hello, I'm using Altera 15.1.0.185 Lite Edition software to do a simple project using MAX10 FPGA, which consists of NIOS II Processor, on chip memory and Jtag UART in Qsys. Compilation is suc...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

You may want to use signal-tap connected to some logic to see if the clock is working and the reset is released...