Forum Discussion
Altera_Forum
Honored Contributor
15 years agoThe C2H compiler will generate a few of files:
1) The verilog/VHDL file that implements the function in hardware (top level of the Quartus II project) 2) A .tcl file that describes the hardware accelerator as a component ("" "") 3) A .tcl file that automatically hooks up the accelerator to the system (" ") 4) A .c wrapper file that includes the accesses to the hardware accelerator, this file gets linked in when you have the hardware accelerator selected in the Nios II IDE for the function implementation. (generated into the software application /Debug or /Release directory)