DMA receive channel

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originally posted by mumford@Mar 29 2007, 12:52 AM

further comments / questions:

the hal api for controlling the dma process appears to be incomplete. to operate a receive side dma from a fixed address and using flow control (including an endofpacket signal) some bits of the dma control register need to be set / cleared. the only way to do this is to resort to the iowr_altera_avalon_dma_control macros and set / clear the bits manually.

now i'm thinking why use the api at all, if i need to resort to older style register access macros. is there any disadvantage to using these macros?

any comments or suggestions welcome.

peter

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Hi Peter,

well I tried to use the HAL API functions, but failed. Maybe I included some headerfiles in the wrong way or don&#39;t no what. Then I changed over to use the IOWR_ALTERA_AVALON_DMA_... macros and it works perfectly. So I couldn&#39;t find any disadvantages.

Additionally I use the "streaming_output_register" component from "Post your own IP" here in the forum. But in my case it&#39;s again a memory to peripheral design, so can&#39;t tell about the other way round. Anyway, maybe you find some ideas there on how to do it.

Big success!