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Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
7 years ago

device tree source ehternet and skew timing => performance issue ?

hello,

i ve some problem with the network performance and the cyclone 5 on linux.

i try different kernel versions, after some error research i found

the solution, it was/is the ethernet skew.

with the socfpga default device tree source @github (socfpga_cyclone5_sockit.dts), i get only ~10-40 Mbits/s with iperf.

i change the skew at the dts and the speed is now ~600Mbits/s.

That was the original stuff: 

&gmac1 {
    status = "okay";
    phy-mode = "rgmii";
    rxd0-skew-ps = <0>;
    rxd1-skew-ps = <0>;
    rxd2-skew-ps = <0>;
    rxd3-skew-ps = <0>;
    txen-skew-ps = <0>;
    txc-skew-ps = <2600>;
    rxdv-skew-ps = <0>;
    rxc-skew-ps = <2000>;
};

i change it to: 

&gmac1 {
status = "okay";
phy-mode = "rgmii";
    txd0-skew-ps = <0>; /* -420ps */
    txd1-skew-ps = <0>; /* -420ps */
    txd2-skew-ps = <0>; /* -420ps */
    txd3-skew-ps = <0>; /* -420ps */
    rxd0-skew-ps = <420>; /* 0ps */
    rxd1-skew-ps = <420>; /* 0ps */
    rxd2-skew-ps = <420>; /* 0ps */
    rxd3-skew-ps = <420>; /* 0ps */
    txen-skew-ps = <0>; /* -420ps */
    txc-skew-ps = <1860>; /* 960ps */
    rxdv-skew-ps = <420>; /* 0ps */
    rxc-skew-ps = <1680>; /* 780ps */
    max-frame-size = <3800>;
    status = "okay";
};

Where can i get the skew settings?

i dont want to roll the dice.

we use an custom design board with cylcone 5 and an micrel ksz9031 phy.

thanks for the support

1 Reply

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    7 years ago

    Hello roll3,

    I stumbled over the same question. So how to find/calculate the correct PHY skew settings? I found the following two sources which deals with the topic:

    1.“Cyclone V and Arria V SoC Device Design Guideline -> Board Design Guideline for SoC FPGAs -> Design Guideline for HPS Interfaces -> HPS EMAC PHY Interface: https://www.altera.com/documentation/doq1481305867183.html#fvj1481304448658

    2. KSZ9031RNX Datasheet -> 3.9.3 RGMII PAD SKEW REGISTERS: http://ww1.microchip.com/downloads/en/devicedoc/00002117f.pdf

    So the skew settings depends on the used MAC (here Cyclone V), the board traces (your layout) and the PHY (here the KSZ9031). However, I did not figure out how to apply the given information correctly. Do you have newer information about the topic?

    Best regards,

    niosIIuser