Honored ContributorHi
I'm using a pio port as an output peripheral and I notice that until the software write to it, the nios put '0' at the register. My question is: How can I set a default value to the pio register? I'm working with : Nios2, sopc builder 5.0, quartus2 5.0 Thanks
Honored ContributorGil,
More of a trick than a fix I afraid. SOPC builder generates several VHDL, or Verilog files depending on what you told it to do. It will create a file that will have the name of your pio (i.e. pio_name.vhd for VHDL, or pio_name.v for Verilog). Open the file, look under the init section of the code, you will see something like this (I use VHDL, it will be similar in Verilog). <div class='quotetop'>QUOTE </div> --- Quote Start --- process (clk, reset_n) begin if reset_n = '0' then data_out <= std_logic'('0'); elsif clk'event and clk = '1' then[/b] --- Quote End --- change the reset condition to look like <div class='quotetop'>QUOTE </div> --- Quote Start --- process (clk, reset_n) begin if reset_n = '0' then data_out <= std_logic'('1'); elsif clk'event and clk = '1' then[/b] --- Quote End --- Recompile your code. Your new default is now 1 instead of 0. This is a trick, and not a fix, each time you generate you core SOPC builder will generate the file and set the default back to 0. You will have to update this file each time you "regenerate" your core. Doug
