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Altera_Forum
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10 years ago

Debugging of the FPGA portion using the HPS ARMs & Linux

Hello All, I have three SPI cores instantiated in the FPGA portion and connected to the AXI3 Lightweight Bridge (ArriaV SX device). I need to start debugging them (write to SPI cor...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

The goal is to debug the path from MPU to Altera SPI Core through AXI3 Lightweight bridge.

The Linux is not compiled yet... So, I only have the U-Boot and SignalTap-II for debugging the path...

What are suggestions? What's the best way to debug this path?