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Altera_Forum
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10 years ago

Debugging of the FPGA portion using the HPS ARMs & Linux

Hello All, I have three SPI cores instantiated in the FPGA portion and connected to the AXI3 Lightweight Bridge (ArriaV SX device). I need to start debugging them (write to SPI cor...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

I'm confused as to what you're trying to debug. If it is custom SPI code, then you'd need SignalTap or a simulator, and use SignalTap triggering the HPS to halt on a trigger event.

If it is the Altera SPI block, then there is a kernel driver available that instantiates the Altera SPI module on the AXI bus as a spidev device, and the HPS can interface directly using the Linux spidev features.

What is your goal?