Forum Discussion
Altera_Forum
Honored Contributor
13 years agoDid you upload the provided .sof file to the FPGA before uploading the software or did you upload a .sof file you compiled yourself from the full featured project?
In the latter case, if you don't have the license for the Nios CPU and some other componenst (such as Ethernet) then your design becomes time limited (it goes into a *_time_limited.sof file) and if you close the evaluation window then all the licensed IP (including the Nios processor) will stop working. If this isn't the case, the reasons for a Nios CPU not to respond are usually basic, i.e. a bad clock or reset signal. Is there a reset switch on the board that could be stuck?