Forum Discussion
Altera_Forum
Honored Contributor
12 years agoHello Daixiwen,
Yes , i have gone through Document AN595.pdf and with the help of this document only, i have come up to this point and even successfully develop the reverse chain of my current project (Receiving data based on External interrupt-outside form FPGA), Earlier or in my previous project, My FPGA generate a Signal which i use as a interrupt for reading data from an Arrya "ImgBuff[640][460]", with the help of VIC. in this current project Interrupt come from external board in serial format (RS422 ) i extract sync word from it and then generate a load signla which act as interrupt in this current project. Though i have made connection as per document AN595.pdf page-9 , but still i attached it with this post for your comment. *during downloading % of download is 0% up to address 08000120 is seems strange (please see attached downloading code.jpeg)