As far as I know, the example provided by Terasic doesn't contain an audio module inside the FPGA fabric.
You have to add an IP Core to the design that can be accessed from the HPS. In addition to that you need a Linux Kernel driver that provides the software support for the Audio IP-Core. This may require a self-compiled Linux-Kernel and a modified device tree.
Have a look at following link. I haven't tested it but on first glance it looks okay:
https://github.com/bsteinsbo/de1-soc-sound (
https://github.com/bsteinsbo/de1-soc-sound)