Forum Discussion
Altera_Forum
Honored Contributor
10 years agoI hope you're not confusing 'Nios' with the Hard Processor System (HPS) in the FPGA on the DE0-Nano-SoC board...
The DDR3 on the DE0-Nano-SoC board is connected to the HPS, not the FPGA fabric where a Nios might be. Whilst some HPS peripheral can be mapped to the FPGA fabric, the DDR3 interface can't. So, you can't 'use the nios ii to access that code' if it's in DDR3, not without having software running in the HPS which then presents the DDR3 data to the fabric via an AXI interface. I'm afraid it's not suprosing the tutorial for the DE0-Nano board isn't working on the DE0-Nano-SoC board. They're quite different beasts. Cheers, Alex